This invention relates to programmable integrated circuit logic array devices of the type shown in Birkner et al. U.S. Pat. No. 4,124,899, issued Nov. 7, 1978, Hartmann et al. U.S. Pat. No. 4,609,986, issued Sept. 2, 1986, Hartmann et .al. U.S. Pat. No. 4,617,479, issued Oct. 14, 1986, Hartmann et al. U.S. patent application Ser. No. 742,089, filed June 6, 1985, now U.S. Pat. No. 4,713,792, and Veenstra U.S patent application Ser. No. 722,684, filed April 12, 1985, now U.S. Pat. No. 4,677,318, all of incorporated by reference herein, and all of which are hereinafter collectively referred to as "the patent references".
Prior programmable integrated circuit logic array devices have not been readily connectable to microprocessors, especially higher speed microprocessors, for certain functions. Various interface devices have been required in many instances between the microprocessor and the programmable logic array device. Prior programmable logic array devices have also not been able to completely process certain information at the basic microprocessor clock rate. This is especially of concern in relation to applications requiring faster and faster microprocessors.
In view of the foregoing, it is an object of this invention to provide improved programmable integrated circuit logic array devices.
It is a more particular object of this invention to provide programmable integrated circuit logic array devices that are more readily connectable to external microprocessors or other similar external devices.
It is another more particular object of in this invention to provide programmable logic array devices that can process information to a greater degree at the clock rate of a microprocessor.
It is yet another more particular object of this invention to provide programmable logic array devices that are capable of performing more logic functions and are programmable to a greater degree.